Buried Features under Mo/Si Multilayer Film Stack

The need for non-destructive nanoscale high resolution imaging of buried and embedded structures is critical for numerous materials, structures and phenomena as they continue to shrink, and the micro/nanofabrication paradigm moves from planar to 3D or stacked platforms. This demands a new technique capable of detecting buried features at nanoscale resolution without sacrificing the sample using complex and ardous cross-section scanning electron microscopy (X-SEM) and transmission electron microscopy (TEM). One of the major metrology challenges in semiconductor industry is to image buried defects such as inclusions, pits and bumps in Mo-Si multilayer (ML) blanks used in extreme ultra-violet lithography (EUVL) is a challenge and no known metrology tool is available to identify such defects in a non-destructive way. Scanning Near Field Ultrasound Holography (SNFUH) in this regard has been shown to provide a new method for high-resolution non-destructive nanomechanical microscopy of buried defects with small or no surface topography. Shown in Figure XX is a model sample similar to one used for extreme ultra-violet lithography (EUVL) consisting of equally spaced electron beam patterned silicon lines and dots buried under multi-layer thin film stacks of Mo-Si layers used for SNFUH imaging. Width of patterned lines and dots is 100nm and 60nm respectively. The thickness of the Mo-Si multi layer is around 280 nm. The traditional AFM topography scans (Fig. XX(A, D) show a uniform and featureless surface except few surface defects. However, the corresponding SNFUH phase images (recorded simultaneously) reveal phase contrast reminiscent of buried e-beam patterned lines, shown in Fig. 3(B), and dots, shown in Fig. 3(E and F), under the multi-stack layers. Fig. 3(E) shows the SNFUH phase image taken at approximately 2 MHz shows the buried dot and is similar to topographical image. No other sub- surface feature is visible at this ultrasonic frequency. As the excitation frequency is increased to 30MHz 2x2 patterns of the buried dots are remarkably visible.

Identification of nanoscale buried features in EUV ML test sample as shown above demonstrate SNFUH to be a versatile tool-set for non- destructive, high resolution and real-space imaging of diverse materials systems.

Accelerated Electromigration in Copper Interconnects

Electro migration and stress induced migration phenomena remain a reliability concerns for buried copper interconnects, especially when the interconnect lines continues to shrink further. Moreover, due to high current densities, formation of voids in metal lines during integrated circuit functioning is a major problem encountered by semiconductor manufacturers. Void formation can alter the device’s electrical behavior and even lead to catastrophic failure. Electromigration testing is normally conducted at random locations on unpassivated interconnect structures, but it is extremely difficult to perform these electrical test at the wafer level. Cross-section scanning electron microscopy (X-SEM) is used to locate the voids and other defects in device structures, but samples need to be sacrificed and it is very difficult for SEM to identify the bulk defects. On the other hand, transmission electron microscopy (TEM) can provide high resolution images, but it requires thinning down to less than 1um and can damage the samples.

Scanning Near Field Ultrasound Holography (SNFUH) have shown to detect electromigration problem in semiconductor devices. Figure XXA shows a schematic cross section of the test structures used in this experiment with two-level copper interconnects which is covered with 300nm of passivation layers comprising SiN and SiO2. These vias were stressed at temperature of about 125°C and at a current density of about 7 x 107A/cm2, which is slightly higher for most of the electromigration testing. Figure XXB shows the topography image of passivation layers with buried Cu interconnects. It appears to be a uniform surface with typical topographical features. Fig. XXC shows the SNFUH image, which clearly shows the buried Cu patterns underneath the dielectric capping layers. In addition to the buried Cu interconnect patterns, voiding due to stress-testing is evident in the vias connecting the two metal lines. There seems to be a significant mass transport along grain boundaries towards the sidewall, where voids grow and agglomerate. Smaller voids are also visible in the SNFUH image.

The results in Fig. XX clearly shows that SNFUH system can easily visualize void formation in buried Cu interconnects, which is not possible with any other existing metrology techniques known today. These results demonstrates application of SNFUH system in recognizing buried patterns while maintaining high resolution, which will open new applications in the non-invasive identification of physical defects for quality and process control in microelectronic devices.